1. Field of the Invention
The invention relates to a method for forming a trench isolation structure, and more particularly to a method for forming a shallow trench isolation structure (STI) with high aspect ratio (AR).
2. Description of the Related Art
Recently, as the manufacturing techniques of semiconductor integrated circuits develop, the number of devices in a chip increases. The size of the device decreases as the degree of integration increases. However regardless of the reduction of the size of the device, adequate insulation or isolation must be formed among individual devices in the chip so that good device characteristics can be achieved. This technique is called device isolation technology. Among different device isolation techniques, local oxidation of silicon (LOCOS) and shallow trench isolation (STI) manufacturing methods are the two most used methods. In particular, as the latter has a small isolation region and can keep the substrate level after the process is finished, it is the semiconductor manufacturing method obtaining the most attention.
In the conventional STI method, an insulating layer is filled in the trench of the substrate by chemical vapor deposition (CVD). Thereafter, the excess insulating layer deposited on the substrate is removed. However, since the aspect ratio of the trench is raised by increasing the integration of the integrated circuit, the conventional deposition apparatus cannot completely fill the trench with insulating layer due to insufficient gap filling ability. Accordingly, poor insulation results, degrading the reliability of the device.
FIGS. 1a to 1c are cross-sections of the conventional method for forming a shallow trench isolation structure. First, in FIG. 1a, a substrate 100, such as a silicon wafer, is provided. Next, a pad oxide layer 102, a pad nitride layer 104 and a patterned photoresist layer 106 are successively formed on the substrate 100. The patterned photoresist layer 106 has a plurality of openings 106a to expose the pad nitride layer 104.
Next, in FIG. 1b, the pad nitride layer 104, the pad oxide layer 102, and the substrate 100 under the openings 106a are successively etched to form trenches 108 with high aspect ratio (ARxe2x89xa73) in the substrate 100. Thereafter, the patterned photoresist layer 106 is removed.
Finally, in FIG. 1c, a silicon oxide layer 110 formed by high-density plasma CVD (HDPCVD) is deposited on the pad nitride layer 104 and in the trenches 108. However, since the conventional CVD apparatus with insufficient gap filling ability cannot completely fill the trenches 108 with HDP oxide layer 110, voids 110a are created in the HDP oxide layer 110 in the trenches 108. As a result, poor isolation between devices reduces the reliability of the devices.
Accordingly, an object of the invention is to provide a method of forming a shallow trench isolation structure using an insulating material with good gap filling ability to fill in the trench, thereby reducing the aspect ratio of the trench to prevent voids or seams in the shallow trench isolation structure.
To achieve these and other advantages, the invention provides a method of forming a shallow trench isolation structure. First, a substrate having at least one trench of aspect ratio more than 3 is provided. Next, the trench is filled with a spin on glass (SOG) layer. Thereafter, a baking is performed on the SOG layer at below 400xc2x0 C. for 30xcx9c60 min. Next, the SOG layer is etched back to a predetermined depth using buffer oxide etch solution (BOE). The proportional volume of ammonium fluoric (NH4F) to hydrofluoric (HF) acid in BOE is about 50xcx9c200:1. Next, a curing is performed on the remaining SOG layer at 750xc2x0 C.xcx9c1000xc2x0 C. for 30xcx9c60 min. The highest temperature of the curing is based on the temperature of subsequent annealing, and both temperatures are substantially equal. Next, an insulating layer is formed on the remaining SOG layer to fill the trench completely. The insulating layer can be high-density oxide. Finally, the insulating layer is annealed.